Total 407 Art / Design / Entertainment job vacancies in George Town

Working Venue - Pasir Panjang

We are looking for a talented graphic designer who can take concepts and ideas to a high level of execution through visual representations in both print and electronic media. The successful candidate will have a thorough understanding of branding and marketing creating or finding the right style/layout for every project.

Please provide your portfolio when applying for this position.

Objectives of this role:

1. Work on a wide range of projects and media using various software programs to visualise and develop innovative graphic designs that meet business goals.

2. Work independently as well as cooperatively with the marketing team to meet deadlines. Stay within budgets and timelines base on project briefs which may include 5 or more simultaneous projects.

3. Examine existing processes, identify flaws and create solutions that improve design capabilities.

4. Update and maintain internal database for designs, photography and video.

Responsibilities:

1. Collaborate, brainstorm and strategize with multiple teams or clients on a wide range of materials that may include web pages, presentation decks, design collaterals, signages and marketing materials.

2. Develop design ideas determining the ideal usage of color, texts, imagery and layout.

3. Manage the design and uploading process for all project materials base on best practices or cost-effective way.

4. Use trend intelligence and knowledge of historical and current markets when designing and executing specific classifications.

5. To work closely with the Creative Director and Creative team.

Required skills and qualifications:

1. Three or more years of experience in professional graphic design preferably with a creative or marketing agency.

2. Exceptional creativity and innovative design skills

3. Excellent communication and presentation skills.

4. Ability to manage timelines.

5. Working knowledge of various graphic design software.

6. Good attitude and passionate hunger to achieve creative goals.

7. Ability to work long hours even on weekends.

8. Bachelor's degree in graphic design, art or related discipline.

9. Interested candidates have to submit relevant portfolios before an interview with the Creative Director can be arranged.

Position Overview:

The Senior/Staff Design Engineer will be responsible for developing micro-architecture for ISP and CV related algorithms, utilizing RTL design using Verilog/System Verilog coding and HLS tools like Catapult. They will analyze metrics such as power, performance, and area to meet key objectives, collaborate with architects and DV Engineersfor efficient verification signoff, and support FPGA tasks such as emulation,validation, and debugging.

Responsibilities:

• Develop micro-architecture for ISP and CV algorithms.
• Perform RTL design using Verilog/System Verilog and HLS tools (Catapult).
• Analyze and optimize metrics like power, performance, and area.
• Cooperate with verification architects and DV engineers to ensure high quality IP delivery.
• Support backend team for SoC signoff.
• Oversee FPGA tasks including emulation, validation, and debugging.

Qualification/Requirements:

• Education: Bachelor/Master’s degree or above in Electrical/Electronics/Computer Engineering is required.
• Experience: Minimum 5yearsand aboveof experience in ASIC design. Expertise in image signal processing projects is beneficial.
• Technical Skills:
• - Advanced proficiency in HDL languages (Verilog, System Verilog).
• - In-depth knowledge of all phases of ASIC frontend design and sign-off.
• - Extensive experience in image/vision/video data processing or algorithm acceleration.
• - Proficiency in scripting languages like Python, Perl, or C/C++.
• Soft Skills: Excellent leadership, teamwork, and communication skills.
• Additional Notes:Stronganalytical skills and the ability to lead complex projects independently and within teams.

As part of IME Integrated Circuit Design and System Department, we are seeking a candidate with relevant experience in analog integrated circuit design. This candidate will contribute to developing analog circuit blocks e.g. low-power operational amplifiers, voltage/current references, and voltage regulators based on thorough topology analysis. This candidate will work closely with other team members for the circuit design, test verification, as well as system integration and validation for a broad range of innovative sensor systems.

Role & Responsibilities

• Circuit schematic design and simulation, layout supervision, pre-tapeout design verification, test plan development and chip measurement
• Work together with teams to investigate novel circuit/system solutions to create new inventions

Requirements

• Bachelor’s / Master’s degree in Electronic Engineering
• Good understanding of CMOS analog IC design methodologies
• Familiar with analog IC design and verification flow
• Industry experience would be a plus
• Familiar with the IC test equipment such as oscilloscope, spectrum analyzer, etc.
• Able to generate high-quality scientific publications and patents
• Team player, quick learner and self-driven

As part of IME Integrated Circuit Design and System Department, we are seeking a candidate with relevant experience in analog integrated circuit design. This candidate will have the opportunity to develop unconventional ultrasound transducer drivers, receiver circuits for IoT and biomedical applications as well as cutting-edge high-speed analog circuits for advanced optical communication.

Role & Responsibilities

• Design and tapeout circuit blocks e.g. high linearity low-noise amplifier, variable gain amplifier, envelop detector, and high voltage driver for MEMS ultrasound transducers.
• Work together with team on system integration and demonstration.
• Work together with team to investigate novel circuit/system solutions to create new inventions.

Requirements

• Master’s / PhD degree in Electrical Engineering or equivalent
• Minimum 2 years of transistor-level analog circuit design experience
• Good understanding of CMOS analog IC design methodologies and successful tapeout experience
• Familiar with analog IC design and verification flow
• Design experience with high voltage BCD process would be a plus
• Familiar with the IC test equipment such as oscilloscope, spectrum analyzer, etc.
• Able to generate high-quality scientific publications and patents
• Team player, quick learner and self-driven

As part of IME Integrated Circuit Design and System Department, we are seeking a candidate with relevant experience in analog integrated circuit design. This candidate will contribute to developing analog circuit blocks e.g. low-power operational amplifiers, voltage/current references, and voltage regulators based on thorough topology analysis. This candidate will work closely with other team members for the circuit design, test verification, as well as system integration and validation for a broad range of innovative sensor systems.

Role & Responsibilities

• Circuit schematic design and simulation, layout supervision, pre-tapeout design verification, test plan development and chip measurement
• Work together with teams to investigate novel circuit/system solutions to create new inventions

Requirements

• Bachelor’s / Master’s degree in Electronic Engineering
• Good understanding of CMOS analog IC design methodologies
• Familiar with analog IC design and verification flow
• Industry experience would be a plus
• Familiar with the IC test equipment such as oscilloscope, spectrum analyzer, etc.
• Able to generate high-quality scientific publications and patents
• Team player, quick learner and self-driven

As part of IME Integrated Circuit Design and System Department, we are looking for a candidate with relevant experience in ultrasound imaging system design. This candidate will define an ultrasound transducer array beamformer IC architecture for imaging applications. The candidate will work closely with MEMS team on system architecture, circuit design, simulation, validation, and integration.

Role & Responsibilities

• Perform system-level beamformer architecture, design, and simulation, to derive circuit-level design specifications.
• Beamforming array optimization using AI algorithms.
• Design and implementation of beamformer algorithm in hardware.
• Work together with team to investigate novel circuit/system solutions to create new inventions.

Requirements

• Master’s / PhD degree in Electrical Engineering or equivalent
• Good understanding of ultrasound imaging systems and beamforming theories.
• Knowledge of AI algorithms and implementation will be a plus
• Familiar with IC test equipment such as oscilloscope, spectrum analyzer, etc.
• Able to generate high-quality scientific publications and patents
• Team player, quick learner and self-driven

Job Summary:
We are seeking an experienced Tosca Test Automation Architect to lead the design, implementation, and strategy of test automation frameworks using Tricentis Tosca. The Tosca Architect will be responsible for developing scalable automation solutions, establishing best practices, and mentoring teams to ensure efficient and comprehensive test coverage across applications.

Key Responsibilities:

Automation Strategy and Framework Design:
• Architect and implement robust, scalable, and maintainable Tosca-based test automation frameworks.
• Define the overall test automation strategy, roadmap, and tool selection for the enterprise.
• Lead the design of end-to-end test automation solutions that support functional, regression, integration, and performance testing.

Tosca Tool Expertise:
• Provide expert-level guidance on the use of Tricentis Tosca for UI, API, database, and mobile automation.
• Implement advanced Tosca features such as distributed execution (DEX), Tosca Orchestrator, and Test Data Management (TDM).
• Evaluate and implement Tosca BI (Business Intelligence) for data-intensive testing.
• Drive the optimization of Tosca assets, test modules, test cases, and test data management for effective and reusable automation.

Leadership and Collaboration:
• Work closely with stakeholders (Customers, QA managers, development teams, business analysts, and project managers) to align test automation efforts with project goals and timelines.
• Collaborate with cross-functional teams to ensure that automation is integrated into the CI/CD pipeline and DevOps practices.
• Lead and mentor automation engineers, guiding them in best practices, Tosca tool usage, and script development.
• Advocate for test automation and provide training sessions to QA teams on the effective use of Tosca.

CI/CD Integration:
• Architect the integration of Tosca test automation into CI/CD tools such as Jenkins, Azure DevOps, or Bamboo.
• Ensure continuous testing by incorporating automated tests into the DevOps pipeline, enabling faster feedback loops and quicker releases.

Test Strategy and Governance:
• Define and implement the governance model for test automation, ensuring proper execution, maintenance, and scalability of automated test cases.
• Set up processes for test data management, reporting, and defect tracking for automated test results.
• Ensure traceability of automated test cases to requirements, design, and acceptance criteria.
• Establish guidelines for managing and maintaining the test automation framework, including regular reviews of automation coverage.

Problem Solving and Optimization:
• Troubleshoot issues related to automation tools, frameworks, and scripts, providing timely solutions.
• Continuously evaluate and improve the automation framework and processes for better efficiency, performance, and scalability.
• Analyze test automation results and implement strategies to minimize manual intervention and maximize automation benefits.

Automation Metrics and Reporting:
• Establish metrics for test automation effectiveness (coverage, defect leakage, execution time) and provide regular reports to stakeholders.
• Define and implement automation dashboards for real-time monitoring of test execution and coverage.

Required Skills and Experience:
Tosca Expertise:
10+ years of experience in software testing with at least 7+ years in Tosca Automation (hands-on with Tosca Commander, API Testing, Tosca BI, etc.).
Expert in Tosca Test Suite including Tosca Automation, Tosca Orchestrator, Distributed Execution, and TDM.
Proven experience in architecting and implementing Tosca-based test automation frameworks for large, enterprise-level applications.

Automation Framework Design:
• Strong experience designing and implementing test automation frameworks from the ground up.
• Proficient in test automation architecture, continuous testing, and implementing test automation within CI/CD pipelines.

Scripting/Programming Knowledge:
• Knowledge of programming/scripting languages such as Java, Python, or VBScript to customize Tosca test automation.
• Experience with database validation using SQL queries and automating backend testing

CI/CD Tools:

• Experience with CI/CD tools like Jenkins, Azure DevOps, Bamboo, and integrating automated tests within the DevOps workflow.

Test Strategy:
• Extensive experience in defining test automation strategies, frameworks, and roadmaps.
• Strong understanding of different types of testing (functional, regression, integration, performance, API, etc.).
Leadership and Mentoring:
• Demonstrated experience leading and mentoring QA automation teams, fostering a culture of continuous improvement and innovation.
• Strong project management skills to oversee automation efforts, timelines, and execution.

Preferred Qualifications:
• Tricentis Tosca Certifications (e.g., Tosca Automation Specialist, Tosca Architect, or Test Automation Engineer).
• Experience with other automation tools and frameworks (e.g., Selenium, UFT, or Cypress) is a plus.
• Familiarity with performance testing tools (e.g., LoadRunner, JMeter) is advantageous.
• Knowledge of cloud platforms (AWS, Azure) and containerization (e.g., Docker, Kubernetes).

Soft Skills:
• Strong communication and interpersonal skills to work with multiple stakeholders and present complex automation strategies clearly.
• Critical thinker with problem-solving skills and a proactive mindset.
• Ability to adapt and work in fast-paced, dynamic environments.

Education:
• Bachelor’s or Master’s degree in Computer Science, Information Technology, or a related field.

This is an opportunity to be a key player at a company with a great reputation in IoT semiconductor technology and growing business. We are looking for experienced/senior engineers to join our team in Singapore and be involved to develop the next generation IoT/AI chips based on a revolutionary architecture.

1. Work with team to define the design of WIFI/BT related modules.
2. Develop RTL design of one or more blocks, define RTL module partition, timing requirement etc.
3. Work with multi-disciplinary groups to make sure designs are delivered on time and with highest quality by incorporating proper checks at every stage of the design process.
4. Assist with the development of company documentation and generation of patents.

Qualification

1. Master's degree in Electrical Engineering (or equivalent), with 5+ years’ industry experience.
2. Team player, with good problem solving and communication skills.
3. Proficiency in System Verilog for RTL logic design and verification.
4. Familiarity with the design of digital MAC/baseband/high-speed interface/CPU or DSP is a plus.
5. Experience in Architecture/Block definition for SOC system such as WiFi, Bluetooth and GNSS.
6. Experience in micro-architecture design, and RTL coding with Verilog, familiar with Cadence and Synopsis tools.
7. Experience in synthesis, with analysis of power, timing and area.
8. Review micro-architecture to meet specification requirements and perform Design Quality Check
9. Experience in RTL and gate level simulation, unit test, system test and EDA verification

At Mediatek’s Memory Design Automation team, we work seamlessly with worldwide memory design team to deliver high performance, low power and small area in-house memories design kits and design flows under advanced technology nodes. We are looking for candidate to join us as memory design automation engineer for the delivery of robust memory and development of Memory Compiler automation flow.

Responsibility

1. Responsible for cutting edge technology node’s SRAM compiler design and deliver best quality of design kit.
2. Seamlessly collaborate with SRAM design and layout team to achieve highest quality of design kit delivery.
3. Responsible for data analysis and platform development of memory usage big data.
4. Responsible for physical verification (DRC/ERC/LVS/ANT/PERC) on SRAM compiler.
5. Responsible for spice simulation on timing, power and noise on SRAM compiler.
6. Responsible for QA check and development on SRAM compiler.

Requirements

1. Bachelor or Master Degree in Electrical and Electronic Engineering or Computer Engineering or Computer Science.
2. Multi-task capability and strong self-driven characteristics to meet challenging schedule.
3. Proficient with Perl, Shell, Python, C/C++ languages, knowledge with AI machine learning algorithm and infrastructure is an added advantage.
4. Strong interpersonal skills to work with team members with multi-cultural environment
5. Knowledge of high performance, low power SRAM/ROM and VLSI design is an added advantage. Experience with EDA tools will be helpful.
6. Candidate with experience is preferable.

Location: One North, Singapore

Why MediaTek?

MediaTek Incorporated (TWSE: 2454) is the world’s 5th largest global fabless semiconductor company. Joining MediaTek means becoming part of a team that powers over 2 billion ICs worldwide, enriching and enhancing everyday life. Our chipsets are integral to a wide range of products, from smartphones, mobile devices to home and IoT devices, in entertainment and multimedia products, and provide connectivity and communication solutions that keep people connected with friends and their families with access to online resources. Working at MediaTek offers you the opportunity to contribute to the world through the devices we use in our daily lives – it’s more than just a job, it’s a chance to make a meaningful impact. – Join us now!

Looking to have a game-changing impact on how we prevent, detect and treat health conditions? Founded by esteemed academic doctors and scientists, at AMILI, we believe that Good Health Starts with Gut Health and that gut-microbiome-led interventions will help prevent and treat serious diseases ranging from diabetes to cancers, to even dementia and common allergies. To enable this, AMILI uses cutting-edge data analytics and is building the world’s largest multi-ethnic gut microbiome reference database to allow the discovery of both clinical and wellness-focused health interventions.

If you are interested in advancing healthcare and are looking for a fast-paced, learning environment, trust your gut and apply today!

What you will do:

· Work directly with bioinformatics scientists to expand and optimize our data and processing pipeline architecture

· Work with partners and customers to onboard them onto our product platform including configuration, integration and customization of the product

· Optimize data flow systems for cross-functional teams in a secured and scalable manner

· Assemble large, complex data sets that meet functional / non-functional business requirements, transforming data into formats that are easy to consume and analyze

· Identify, design, and implement internal process improvements, e.g., automating manual processes, optimizing data delivery, and re-designing infrastructure for greater scalability

· Build analytics tools that utilize the data pipeline to provide actionable insights into key performance metrics and support our next gen of products and data initiatives.

What you will need:

· Bachelor’s degree in Computer Science, Bioinformatics, Data Science, or related field with 5+ years of experience/Master’s degree with 3+ year of experience

· Strong core software engineering and design principles such as object-oriented programming, version control, and runtime optimization

· Experience in working with partners to firm up requirements for integration or customization in writing

· Strong coding and software architecture design skills in at least one language (preferably Python)

· Familiarity with AWS services like S3 and EC2 and experience with working in a Unix environment

· Familiarity with pre/post sales technical support to the commercial team including answering RFP/RFQ and designing solutions based on the platform targeting the specific needs of the customer/partner

· Preference for with bioinformatics NGS data stored in both SQL database and NoSQL database

· Willingness to travel in the region when required to provide support to customers

What is good to have:

· Experience building bioinformatics pipelines for processing NGS data

· Proficiency with SQL and MongoDB NoSQL query

· Experience building software in an industry setting

· Experience with management tools like GIT, Airflow, Glue, or NextFlow

· Strong understanding of AWS tools such as S3, EC2, RDS, and Lambda

· Some microbiology genomics background or experience with prokaryotic genomic sequencing data

Mediatek’s Memory Design Automation team is looking for fresh talent to join us as a modeling engineer for the development of behavioral, FPGA, timing and DFT simulation models. The role will be required to create, debug and optimize SRAM models for ASIC design flow.

The candidate must be a team player, able to communicate clearly and concisely to deliver quality work on time.

About the team:

The Mediatek’s Memory modelling team collaborates with the world-wide memory design teams to create and qualify front-end models for use in the ASIC design flow. Team members will also be expected to perform circuit design verification to ensure memory circuits robustness.

What you do:

• Develop and integrate automation code into existing memory compilers to generate models meant for ASIC design flow.
• Develop automation flow and scripts with Perl or Python.
• Execute EDA tools from vendors such as Synopsys, Mentor to verify models’ correctness.
• Stay up to date with current modeling standards and development to improve models and flows for better memory IP performance.
• Work with memory design, compiler team and DFT team and tool vendors to resolve model issues and find solutions.

What you bring:

• Must have a Bachelor’s degree or higher in Electrical Engineering, Electronics Engineering, or related discipline with at least 3 years of semiconductor industry experience.
• Have at least 3 years experience using Linux systems.
• Good understanding of verilog syntax and its various aspects, such as behavioral, RTL and synthesizable verilog is a must.
• Good understanding of liberty timing syntax.
• Good understanding of upf and system verilog.
• Knowledge and experience with EDA simulation tools such as VCS, NC is required
• Experience with EDA tools will be helpful:

o DFT: Logicvision, Tessent, Fastscan

o Synthesis: Design compiler, Genus

o Simulation tools:VCS, QuestaSim, NC

o STA tools such as PrimeTime

• Good scripting and flow automation skills, in Perl or Python.
• A team player, meticulous, able to work and learn independently are important attributes for this job.

Location: One North, Singapore

What you will do

• Develop and review test plans.
• Develop verification environment/testbench in Module/IP/SOC level.
• Develop verification IP and reference model.
• Implement test with randomization based coverage driven verification methodology.
• Implement functional and functional/code coverage closure.
• Hands-on code/debug with UVM, SystemVerilog, Verilog and SystemC.
• Low Power verification.
• Verification automation flow.

What you will bring

• Bachelor's/Master's Degree in EEE/Computer/IC design/equivalent.
• With min. of 8 years of relevant verification experiences.
• With IC/ASIC design verification experience on SOC, Ethernet, PCIe, DDR, USB, ARM CPU.
• Strong experience and debugging ability on SystemVerilog/UVM.
• Skilled in Synopsys/Cadence/Mentor Simulator and debugging flow.
• Experience on Low Power and formal verification is a plus.
• Strong in UNIX scripting with Pyhon, Perl, makefile Cshell.
• Fast learner and a good team player.
• Candidates with more years of experience will be considered for a more senior role.

About the team

Our ASIC DV Team focus on developing full and advanced verification methodology IP/SOC. You will have chance to work on challenging projects that attractive and be immersed in leading tech e.g.: WiFi, 5G, AR/VR, AI, Cloud Networking. A comprehensive program for professional development / career growth will be provided to the new joiner and he/she will have chance to learn from the best expert in this area.

In MediaTek, we promote diversity and inclusiveness. Passionate talents who love new challenges and keen on learning new technologies, do send us your cv our way today and join our multicultural team that consists of talents from all over the world!

As a Consulting Service Solution Architect and Lead, you will be working with a variety of customers from all sectors and industries to provide consultancy and Oracle cloud implementation services for our customers.

Your core responsibility is to operate independently to provide quality work products to an engagement, understand customers business challenges and requirements, identify business processes and opportunties to increase efficiency, recommend and influence customer leadership in acceptance of best practice based and innovative solutions using Oracle Cloud Application and Technology solutions. You will have opportunities to engage with a variety of customers from all sectors and industries, including Hitech and other manufacturing.

You will be given significant opportunities to build fulfilling careers at Oracle through exposure to industry-leading technology and experts and participation in various strategic initiatives that contrribute to the success of the company. More than 5 implementation experience of Oracle ERP/SCM specializing in service and SCM modules in consumer and High-Tech industry.

Organization Description

The pandemic has highlighted how important telecoms networks are to society. Nokia’s Network Infrastructure group is at the heart of a revolution to bring more and faster network capacity to people worldwide through our ambition, innovation, and technical expertise.

Employer Description

Come create the technology that helps the world act together

Nokia is committed to innovation and technology leadership across mobile, fixed and cloud networks. Your career here will have a positive impact on people’s lives and will help us build the capabilities needed for a more productive, sustainable, and inclusive world.

We challenge ourselves to create an inclusive way of working where we are open to new ideas, empowered to take risks and fearless to bring our authentic selves to work.

What we offer

Nokia offers continuous learning opportunities, well-being programs to support you mentally and physically, opportunities to join and get supported by employee resource groups, mentoring programs and highly diverse teams with an inclusive culture where people thrive and are empowered.

Nokia is committed to inclusion and is an equal opportunity employer

Nokia has received the following recognitions for its commitment to inclusion & equality:

· One of the World’s Most Ethical Companies by Ethisphere

· Gender-Equality Index by Bloomberg

· Workplace Pride Global Benchmark

At Nokia, we act inclusively and respect the uniqueness of people. Nokia’s employment decisions are made regardless of race, color, national or ethnic origin, religion, gender, sexual orientation, gender identity or expression, age, marital status, disability, protected veteran status or other characteristics protected by law.

We are committed to a culture of inclusion built upon our core value of respect.

Join us and be part of a company where you will feel included and empowered to succeed.

Job Description

This is a fantastic opportunity for veterans in the telco industry. The role demands a whole rounded technical skill, ability to converse at the CTO level, strategic development of End-to-End use cases based on the entire Nokia Network Infrastructure department portfolio consisting in GPON, Optics, IP/MPLS and datacenter with their associated orchestration layers and controllers.

HOW YOU WILL CONTRIBUTE AND WHAT YOU WILL LEARN

The shortlisted candidate will be part of a small regional team covering APJ, to demo and present advanced tailor-made use cases harnessing the capabilities of the Network Infrastructure portfolio.

The candidate will leverage on a centralized lab to show case all the cutting-edge features and technologies. He/She will also customize automation use cases leveraging on programming and modelling languages such as Python, JavaScript and YANG. Most of the activities that the successful candidate will be involved into are related to pre-sales support, although occasionally might be involved into post sales projects, whenever complex solution spanning multiple technologies has to be delivered. As this is a regional role travel is expected. The E2E Architect will be mostly interacting with pre-sales teams, consulting engineers and Product Line Managers, a well as PMs whenever assigned to complex projects.

Qualifications

• 10 or more years of experience in the Telco Industry
• 3 or 4 years in a consultative role
• Overall able to converse and present to customer VP and CxO level
• Good dose of hands-on skills, on IP/MPLS gear and SDN controller as minimum
• Multi domain experience is a good to have
• Dynamic, able to take initiative and working under minimal supervision
• Different grade of experience with network infrastructures in the following areas
• o Hands on and architect experience on IP/MPLS equipment
• o Knowledge of Optical technology
• o Good grasp of automation and Python scripting
• o Knowledge of service orchestration and SDN controllers
• Overall understanding of market trends and emerging technologies and use cases
• Recognized industry certifications is a plus
• Good attitude, team player and ability to work under stressful situations
• Passion for technology and continuous learning
• Having an open mindset to drive innovative ideas

Interested applicants are invited to apply directly at the NUS Career Portal

Your application will be processed only if you apply via NUS Career Portal

We regret that only shortlisted candidates will be notified.

Job Description

Research Area: Design for an aging population.

The research associate is expected to have solid understanding of the physical and mental capabilities of elderly citizens. The task will be to determine the most important areas of physical and mental degradation that affect the quality of lives of elderly citizens as well as the remedies that have been designed to address these areas of degradation.

Qualifications

The researcher needs to have a Masters' degree with at least 2 years' relevant experience, in physiotherapy, public health, bio-medical sciences (including bio-mechanical engineering).